金年会官网入口在线登录网址

Overview

金年会官网入口在线登录网址e 金年会官网入口在线登录网址CV216 is designed to support video data conversion from V-by-One®HS input signals into LVDS signals. 金年会官网入口在线登录网址is chip can transmit 39bits video data and 3bit control signal via only a single differential cable at an LVDS clock frequency form 20MHz to 100MHz. It has two high-speed data lane and, effective maximum serial data rate is 3.0Gbps/lane up to 1080p/60Hz/36bits colors.

  • V-by-One®HS to LVDS Conversion
  • V-by-One®HS 2lanes input
    　3.75Gbps（effective rate 3.0Gbps）/lane
  • 6ch LVDS 2port（Dual Pixel Link）output
    　36bits/pixel
    　140-700Mbps/ch
  • Power Supply：1.8/3.3V
  • Package：TSSOP64
  • Recommended Tx：
    　InterfaceV-by-One®
    　InterfaceV-by-One®
V-by-One®HSInput LVDS Data Output LVDS Output Clock Frequency
1Lane 4ch(24bit) 20MHz to 100MHz
2Lane 4ch(24bit)×2 20MHz to 100MHz
1Lane 5ch(30bit) 20MHz to 85MHz
2Lane 5ch(30bit) ×2 20MHz to 85MHz
1Lane 6ch(36bit) 20MHz to 75MHz
2Lane 6ch(36bit) ×2 20MHz to 75MHz