金年会app官方网

Overview

金年会app官方网e 金年会app官方网CV218 is designed to support video data conversion from V-by-One®HS input signals into LVCMOS signals. 金年会app官方网is chip can transmit 32bit video data and 3bits control signals at a pixel clock frequency 20MHz to 85MHz. It has two high-speed data lane and, effective maximum serial data rate is 2.72Gbps/lane up to 1080p/60Hz/30bits colors.

  • V-by-One®HS to LVCMOS Conversion
  • V-by-One®HS 2lanes input
    　3.4Gbps（effective 2.72Gbps）/lane
  • LVCMOS 2ports output
    　32bits/pixel
  • Power Supply：1.8/3.3V
  • Package：TFBGA145
  • Operating Temperature：-20 to 85℃
  • Recommended Tx：
    　InterfaceV-by-One®
    　InterfaceV-by-One®
V-by-One®HSInput LVCMOS Output LVCMOS Output Clock Frequency
1Lane 32bit 20MHz to 85MHs
2Lane 32bit 40MHz to 170MHs
2Lane 32bit x2 20MHz to 85MHs

Go to FAQ for this 金年会app官方网

FAQ

Purchase Samples

Buy at Chip One Stop

Buy at Digi-Key

Download documents