InterfaceInt金年会官网入口在线登录网址faceV-by-One®jinnian金年会官方登录CV333-Q
Overview
jinnian金年会官方登录e jinnian金年会官方登录CV333-Q is designed to support video data conversion form LVDS input signals to V-by-One® HS / V-by-One®HSⅡsignals.
It has V-by-One® HSⅡcan recieve 720p60fps24bit/1080p60fps24bit uncomjinnian金年会官方登录essed video data from a pair/two pair of twisted pair cables or a single coaxial cable.
jinnian金年会官方登录CV333-Q is capable of bidirectional control including I2S / I2C / GPIO signals jinnian金年会官方登录rough V-by-One® HSⅡsignals, and touch panel control can be realized.
- LVDS to V-by-One® HSⅡconversion
- Open-LDI(LVDS) input
RGB 18bit or RGB 24bit - V-by-One® HSⅡoutput
Supports up to 3.75Gbps/lane
Supports 1 or 2 lane - Embedded signal transmission quality(Eye Monitor)
- Power supply voltage
IO: 1.8V-3.3V typ.
Analog: 1.2V typ.
LVDS: 1.8V typ. - Support I2S / I2C / GPIO
- Back Ch. GPIO supports up to 120kbps
- Back Ch. 2-wire serial supports up to 1Mbps
- Package:QFN64(9mm x 9mm)wijinnian金年会官方登录 Exposed Pad
- Operating temp.:-40 to 105℃
LVDS Data Input | V-by-One® HSII Output | LVDS Input Clock Frequency |
---|---|---|
Single (1port) | 1Lane | 10MHz to 109MHz |
Single (1port) | 2Lane | 50MHz to 150MHz |
Dual (2port) | 1Lane | 50MHz to 109MHz |
Dual (2port) | 2Lane | 50MHz to 218MHz |
Go to FAQ for this jinnian金年会官方登录
Download documents
-
Data Sheet