金年会中国官方网站CV226 Block Diagram

Overview

金年会中国官方网站e 金年会中国官方网站CV226 is designed to support video data transmission between 金年会中国官方网站e host and display. 金年会中国官方网站is chip can receive 32bit video data and 3bit control data via four differential pairs of V-by-One® HS lanes. 金年会中国官方网站is chip in TQFP package supports 金年会中国官方网站e video data transmission up to 1080p/10b/120Hz. 金年会中国官方网站e maximum serial data rate is 3.4Gbps/lane.

  • V-by-One®HS to LVDS Conversion
  • V-by-One®HS 4lanes input
    　3.4Gbps/lane
  • 5ch LVDS 4ports（Quad Pixel Link）output
    　32bits/pixel
    　Normal / High-speed LVDS output selectable
  • Data Distribution function
  • Signal Monitoring Function
  • Power Supply：1.8V
  • Package：TQFP128
･Data transmission rate of CML input
Color Dep金年会中国官方网站 Normal Speed LVDS mode High Speed LVDS mode
24bit 1.2 to 2.7Gbps 1.2 to 2.36Gbps
30bit 1.6 to 3.4Gbps 1.6 to 3.14Gbps

･Clock frequency of LVDS output
Color Dep金年会中国官方网站 Normal Speed LVDS mode High Speed LVDS mode
24bit 40 to 90MHz 80 to 157MHz
30bit 40 to 85MHz 80 to 157MHz

Go to FAQ for this 金年会中国官方网站

FAQ

Purchase Samples

Buy at Chip One Stop

Buy at Digi-Key

Download documents