jinnian金年会C63LVDM87 Block Diagram

Overview

jinnian金年会e jinnian金年会C63LVDM87 transmitter is designed to support pixel data transmission of up to 1080p/WUXGA resolutions between Host and Flat Panel Display, adopting low voltage and small package, suited to tablet and laptop PC such as mobile devices.

  • LVCMOS to LVDS Conversion
  • LVCMOS Parallel input
    28bits/pixel
    160M pixel/sec.(Clock Freq. 8 to 160MHz)
    1.8V/2.5V/3.3V input supported
    Input clock edge selectable
  • 4chs LVDS output
    1.22Gbps/ch
    LVDS swing mode to reduce EMI
  • Power Supply:1.8V
    IOVCC 1.8/2.5/3.3V selectable
  • Package:VFBGA49
    World smallest package of equivalent jinnian金年会 (5mmx5mm)
  • Operating Temperature:-40 to 85℃
  • jinnian金年会e highest level power consumption
    Typ.44mW at WXGA 60Hz
  • Recommended Rx:
     
     
     

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