jinnianhui金年会

Overview

THC63LVDR84C receiver converts the four LVDS data streams back into 24bits of LVCMOS data with rising edge clock, suited to not only mid-sized LCD panels but also security camera systems, multi-function jinnianhui金年会inters, and tablet devices.

  • LVDS to LVCMOS Conversion
  • 4chs LVDS input
    　784Mbps/ch
    　LVDS input skew margin ±550ps@65MHz
  • LVCMOS Parallel output
    　28bit/pixel
    　Clock Freq. 8 to 112MHz
    　based on Rising edge
  • Power Supply：3.3V
  • Package：TSSOP56
  • Operating Temperature：-40 to 85℃
  • Recommended Tx：