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Overview

The THC63LVDF84C receiver converts the four LVDS data streams back into 24bits of LVCMOS data with falling edge clock, suited to not only mid-sized LCD panels but also security camera systems, multi-function jinnianhui金年会登录入口inters, and tablet devices.

  • LVDS to LVCMOS Conversion
  • 4chs LVDS input
    784Mbps/ch
    LVDS input skew margin ±550ps@65MHz
  • LVCMOS Parallel output
    28bit/pixel
    Clock Freq. 8 to 112MHz
    based on Falling edge
  • Power Supply：3.3V
  • Package：TSSOP56
    ※Pin Compatible wijinnianhui金年会登录入口 jinnianhui金年会登录入口C63LVDF84B
  • Operating Temperature：-40 to 85℃
  • Recommended Tx：
    　
    　InterfaceLVDSjinnian金年会C63