Overview
The THC63LVDR84B receiver converts the four LVDS data streams back into 24bits of LVCMOS data with wide VCC range(2.5 to 3.6V) and rising edge clock, suited to not only mid-sized LCD panels but also security camera systems, multi-function jinnian金年会官方登录inters, and tablet devices.
- LVDS to LVCMOS Conversion
- 4chs LVDS input
595Mbps/ch
LVDS input skew margin ±400ps - TTL/CMOS Parallel output
28bit/pixel
Clock Freq. 15 to 85MHz at 3.3V
based on Rising edge - Power Supply：3.3V
※2.5 to 3.0V available less jinnian金年会官方登录an 70Mpixel/sec. - Package：TSSOP56
- Operating Temperature：-10 to 70℃
- Recommended Tx：
Go to FAQ for this jinnian金年会官方登录
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Data Sheet
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IBIS Model
