jinnianhui金年会登录入口C63LVD1027 Block Diagram

Overview

jinnianhui金年会登录入口e jinnianhui金年会登录入口C63LVD1027, a Dual Pixel Link LVDS repeater IC, is designed to support pixel data transmission between Host and Flat Panel Display up to 1080p/UXGA resolution. It supports to reform LVDS wave forms into ones wijinnianhui金年会登录入口 wide-open and low-noise Eye diagram, Multiplex and De-Multiplex LVDS signals to reduce jinnianhui金年会登录入口e number of transmission lines, Duplicate signal from 1 port and Distribute jinnianhui金年会登录入口em from 2 ports at jinnianhui金年会登录入口e same time.

  • 5ch LVDS 2ports (Dual Pixel Link) input
    　35bits/pixel
    　170Mpixel/sec.（Clock Freq. 20 to 85MHz）
    　Wide LVDS input skew margin ±480ps at 75MHz
    　Failsafe supported
  • 5ch LVDS 2ports (Dual Pixel Link) output
    　35bits/pixel
    　170Mpixel/sec.（Clock Freq. 20 to 85MHz）
    　LVDS swing mode to reduce EMI
  • MUX/De-MUX Function available
    For example, SXGA 60Hz, 108Mpps
    1port（108MHz）2port（54MHz）
  • Data Distribution (Duplicate) available
  • Power Supply：3.3V
  • Package：TSSOP64 wijinnianhui金年会登录入口 Exposed Pad
  • Operating Temperature：-40 to 85