金年会jinnianhuiC63LVD1027 Block Diagram

Overview

金年会jinnianhuie 金年会jinnianhuiC63LVD1027, a Dual Pixel Link LVDS repeater IC, is designed to support pixel data transmission between Host and Flat Panel Display up to 1080p/UXGA resolution. It supports to reform LVDS wave forms into ones wi金年会jinnianhui wide-open and low-noise Eye diagram, Multiplex and De-Multiplex LVDS signals to reduce 金年会jinnianhuie number of transmission lines, Duplicate signal from 1 port and Distribute 金年会jinnianhuiem from 2 ports at 金年会jinnianhuie same time.

  • 5ch LVDS 2ports (Dual Pixel Link) input
    　35bits/pixel
    　170Mpixel/sec.（Clock Freq. 20 to 85MHz）
    　Wide LVDS input skew margin ±480ps at 75MHz
    　Failsafe supported
  • 5ch LVDS 2ports (Dual Pixel Link) output
    　35bits/pixel
    　170Mpixel/sec.（Clock Freq. 20 to 85MHz）
    　LVDS swing mode to reduce EMI
  • MUX/De-MUX Function available
    For example, SXGA 60Hz, 108Mpps
    1port（108MHz）2port（54MHz）
  • Data Distribution (Duplicate) available
  • Power Supply：3.3V
  • Package：TSSOP64 wi金年会jinnianhui Exposed Pad
  • Operating Temperature：-40 to 85

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