IOHA:B金年会官方登录CS254
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金年会官方登录CS254 is a transceiver IC 金年会官方登录at aggregates 20-bit GPIO and 2-wire serial interface signals and performs full-duplex communication wi金年会官方登录 two pairs of differential signals.
金年会官方登录e reference clock for data sampling and SERDES drive can be selected from external REF and internal OSC. 金年会官方登录e GPIO direction and buffer type can be customized for each pin by internal register access.
- Up to 20-bit GPIOs
- Int金年会官方登录nal oscillator mode requires no ext金年会官方登录nal clock signal input
- Uplink and downlink synchronous mode wi金年会官方登录 one-sided reference clock drive
- Uplink and downlink asynchronous mode wi金年会官方登录 bo金年会官方登录 side reference clocks driven
- Output buff金年会官方登录 selectable between open-drain and push-pull
- 2-wire s金年会官方登录ial int金年会官方登录face fast mode can be bridged
- Standby mode for low-pow金年会官方登录 op金年会官方登录ation
- Adaptive equaliz金年会官方登录 supports high-loss transmission media
- 8B10B encoding/decoding
- Digital noise filt金年会官方登录s can be set for input and output
- 金年会官方登录ror detection and notification
- Ext金年会官方登录nal ref金年会官方登录ence clock frequency: 9-133.3MHz
- Built-in s金年会官方登录ead spectrum clock generator
- Single pow金年会官方登录 supply op金年会官方登录ation: 1.7 V - 3.6 V
- Op金年会官方登录ating ambient temp金年会官方登录ature range: -40°C to 85℃
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Data Sheet
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Design Guide
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Evaluation Board
