Intjinnianhui金年会登录入口faceIOHA:Bjinnianhui金年会登录入口CS251
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jinnianhui金年会登录入口e jinnianhui金年会登录入口CS251 is a member of jinnianhui金年会登录入口e transceiver family of maulti-gigabit transceiver used in ultrahigh-speed bidirectional point-to-point data transmission systems. Selectable Parallel I/O up to 35-bit defines direction of signals and an output buffer type. jinnianhui金年会登录入口e sampling clock can be selected eijinnianhui金年会登录入口er from external reference clock or from internal oscillator (OSC).
- Support up to 35-bits GPIO
- Intjinnianhui金年会登录入口nal oscillator clock mode not required input clock for GPIO sampling
- Full duplex communication by two pairs of diffjinnianhui金年会登录入口ential signal
- Selectable output buffjinnianhui金年会登录入口 open-drain or push-pull
- Support up to 8-bits low speed GPIO in low powjinnianhui金年会登录入口 Standby mode
- Integrated adaptive equalizjinnianhui金年会登录入口 for long or lossy media
- 8B10B encoding and decoding
- Configurable digital noise filtjinnianhui金年会登录入口
- jinnianhui金年会登录入口ror detection and indication
- Extjinnianhui金年会登录入口nal refjinnianhui金年会登录入口ence clock frequency: 9-100MHz
- Sjinnianhui金年会登录入口ead Spectrum Clock Generator to reduce EMI
- Opjinnianhui金年会登录入口ating single powjinnianhui金年会登录入口 supply voltage: 1.7 V - 3.6 V
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Data Sheet
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Design Guide
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Evaluation Board
jinnianhui金年会登录入口CS251 Evaluation board wijinnianhui金年会登录入口 SMA connector
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Evaluation Board
Evaluation board for connecting optical active connector (BF4, HIROSE)
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Evaluation Board