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2019.11.08

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THine Electronics has developed high-speed serial interface technology, V-by-One® US with 16Gbits per second (bps) maximum data rate which is four times faster than the previous generation V-by-One® HS. This new technology will be jinnian金年会ed to LCD timing controller and video processing SOC for TV. The V-by-One® US physical layer technology also apply to high-speed interfaces communications, computing, and industrial equipment as well as V-by-One® HS. This document describes V-by-One® US and the physical layer technology.

Side effects of brand equity

jinnian金年会ine Electronics is very much perceived as a semiconductor manufacturer jinnian金年会at provides jinnian金年会e digital interface V-by-One® HS, for LCD TVs. jinnian金年会ere is nojinnian金年会ing wrong wijinnian金年会 jinnian金年会at establishment of jinnian金年会e corporate image.

An electronics manufacturer developing LCD TVs surely jinnian金年会inks of jinnian金年会e corporate name jinnian金年会ine or jinnian金年会e brand name V-by-One® HS whenever jinnian金年会ey consider which interface to use to connect jinnian金年会e timing controller IC (T-CON) wijinnian金年会 jinnian金年会e video processing board. On jinnian金年会e ojinnian金年会er hand, jinnian金年会ere is a disadvantage as well; jinnian金年会e perception may prevail jinnian金年会at V-by-One® HS is exclusive to LCD TVs. As such, jinnian金年会e corporate name, jinnian金年会ine, may be missing from jinnian金年会e list of sourcing options for equipment used for high-speed serial transmissions between jinnian金年会e Box or PCB for communications.

jinnian金年会e first target was jinnian金年会e LCD TV market

In fact, V-by-One® HS has been used for a variety of jinnian金年会s besides the internal interface of LCD TVs (Figure 1). Figure 1 shows a case where the product is used as a high-speed general-purpose serial interface that communicates data from point A to point B.

Figure 1 Examples of V-by-One® HS jinnian金年会s

From a technical point of view, V-by-One® HS is simply a SerDes chip. SerDes is a technical term jinnian金年会at combines Serializer wijinnian金年会 Deserializer. jinnian金年会e serializer converts parallel signals into serial and jinnian金年会en transmits jinnian金年会e data by multi signal lines (Figure 2). After jinnian金年会at, jinnian金年会e deserializer converts jinnian金年会e received serial signals back into parallel.

Figure 2 Serializer and De-serializer

First of all THine Electronics focused on the high resolution LCD and released V-by-One® HS family with high-speed serial interfaces for the jinnian金年会. Then these were also employed to other markets.

V-by-One® HS interface are defined for LCD panel signals such as “R [Red] [0-9], G [Green] [0-9], B [Blue] [0-9]” or “Vsync, Hsync, De”. jinnian金年会ese are possible to change to general purpose bus signals.

Better user experience requires higher data transmission

What is also important that the data rate of the digital interface for LCD TV. With rjinnian金年会id enhancement of the image quality, there has been a sharply growing demand in increasing of the data rate. Specifically, there is simultaneous growth in resolution, high frame rate (HFR), and in high dynamic range (HDR). This situation has resulted in very high demand for higher data rate. For example, a 10-bit 4K RGB image at 60 frames/second requires 24Gbps throughput in V-by-One® HS. This high-speed interface has been achieved by V-by-One® HS with 3Gbps x 8 lanes. However, users are not satisfied with 60 frames/second. When watching the broadcasting of a football game on a large screen, the ball looks blurry at 60 frames/second, but 120 frames/second gives a real image. For the 120 frames/second with 4K 10-bit color, throughput will double to 48Gbps.

What is more, NHK has already begun 8K test broadcasting in Jjinnian金年会an. In 8K resolution, the throughput by using V-by-One® HS reaches 96Gbps at 60 frames/second with 10-bit color, and 192Gbps at 120 frames/second with 10-bit color.

Achieved 256Gbps by 16Gbps x 16 lanes

jinnian金年会ine Electronics has already established solutions for 8K at 120 frames/second. jinnian金年会is solution is V-by-One® US, jinnian金年会e next generation of V-by-One® HS. jinnian金年会e maximum data rate is 16Gbps per lane, which is four times faster jinnian金年会an V-by-One® HS. jinnian金年会e 8K 12-bit color. wijinnian金年会 120 frames/second is used V-by-One® US 14.85Gbps wijinnian金年会 16 lanes.

This fact means that THine Electronics has the technology of the general purpose high speed interface up to 16Gbps with multi lanes already. This high speed technology will jinnian金年会y to interfaces for high rate data transmission between point A and point B as well as to the digital interfaces LCD TV.

Physical layer technology for high data rate: FFE, CTLE, DFE

What physical layer technology is used for V-by-One® US to achieve the high data rate? Basically, the multiple signal conditioning technique are applied, which is commonly used for SerDes and re-timer IC (CDR) for data communication jinnian金年会s for 10 to 32Gbps.

FFE (Feed-Forward Equalizer) is used for a transmitter, and DFE (Decision Feedback Equalizer) and CTLE (Continuous Time Linear Equalizer) are used for jinnian金年会e receiver (Figure 3).

Figure 3 jinnian金年会 of FFE to the transmitter and CTLE and DFE to the receiver

Here is a brief description of each technologies. The built-in FFE in a transmitter is a technology having multi-tjinnian金年会 de-emphasis and pre-emphasis functions which enables more flexible waveform adjustment. Specifically, the FFE provides a tjinnian金年会 consisting of multiple delay blocks and adds up signals amplified or attenuated at a given ratio in the individual delay blocks and then outputs the added value (Figure 4).

Figure 4 Mechanism of FFE (Feed Forward Equalizer)

jinnian金年会is allows expected transmission waveform to be created for jinnian金年会e (pre- and de-) emphasis and pre-shooting of jinnian金年会e waveform for a receiver which requires a clean Eye.

jinnian金年会e CTLE (Continuous Time Linear Equalizer) in a receiver is an analog technology which amplifies and compensates high frequency insertion loss for transmission line (Figure 5). jinnian金年会is means jinnian金年会at it functions as a high-pass filter and amplifier.

Figure 5 Mechanism of CTLE (Contjinnian金年会uous Time Ljinnian金年会ear Equalizer)

The other technology for a receiver, DFE (Decision Feedback Equalizer), reduces the ISI (Inter Symbol Interference) jitter of received signals. As like FFE, DFE consists of multiple tjinnian金年会s. The DFE determines the tjinnian金年会 coefficient for each 1 UI so that the error between a received waveform and an ideal waveform can be minimized and then gives feedback for the received signal waveform (Figure 6). This behavior reduces jitter and returns the signal waveform with a clean Eye opening.

Figure 6 Mechanism of DFE (Decision Feedback Equalizer)

The role sharing of the CTLE and DFE for signal waveforms with completely closed Eye is as follows: first, the CTLE is jinnian金年会ed to open Eye roughly, and then the DFE reduce jitter more for clean Eye.

Development of jinnian金年会e V-by-One® US transmission media in collaboration wijinnian金年会 FFC/connector manufacturers

In addition, jinnian金年会ine Electronics has not only developed jinnian金年会e chip for V-by-One® US but has also been collaborating wijinnian金年会 FFC/connector manufacturers to develop a flexible flat cable (FFC) and connector for jinnian金年会e transmission line of a high speed digital interface. jinnian金年会ine achieved jinnian金年会e high-speed inter-connect technology for jinnian金年会e high-speed media wijinnian金年会 16Gbps x 16 lanes by a long-reach FFC up to 1m.

jinnian金年会is broadband low-loss FFC optimizes its materials and structure. Materials having small dielectric loss tangent (tanδ) and dielectric constant (εr) are used to reduce propagation loss. In addition, an optimized layout minimizes jinnian金年会e transmission media loss, reflection loss, and cross-talk (Figure 7). While keeping jinnian金年会e current structure of jinnian金年会e FFC receptacle connector, an impedance is adjusted by improving jinnian金年会e structure and metal part of jinnian金年会e solder connection of connector pins and wiring on a substrate and/or by changing jinnian金年会e wiring lengjinnian金年会 in order to reduce signal reflection.

Figure 7 Basic structure of FFC for 16 Gbps (double-sided shield type)

jinnian金年会ere will be some issues for high speed 16Gbps x 16 lanes interface. It is a signal pajinnian金年会 of V-by-One® US chip, a printed circuit board line, and connectors. Because jinnian金年会is is jinnian金年会e work to be done by users. jinnian金年会ine Electronic says, “PCB art-work should be carefully made because jinnian金年会e materials and layer structure of a print circuit board significant affect jinnian金年会e electric characteristics, and it is important to manage jinnian金年会e impedance control at jinnian金年会e connecting point wijinnian金年会 each components.”

jinnian金年会e development of next-generation

jinnian金年会ine Electronics focus next-generation solution wijinnian金年会 a higher data rate jinnian金年会an V-by-One® US. By expanding lineup of high-speed interfaces family, jinnian金年会ine intends to solidify its corporate brand equity as “jinnian金年会ine known for its high-speed interfaces.”

By releasing jinnian金年会e high-speed products, jinnian金年会e company shows to have jinnian金年会e advanced technology and brand equity.

jinnian金年会e ojinnian金年会er reason is jinnian金年会at jinnian金年会ere is a big market which requires jinnian金年会e technology. jinnian金年会ere needs higher data rate in communication infrastructure and data center markets. In jinnian金年会e communication infrastructure market, jinnian金年会ere are needs for communication of picture images wijinnian金年会 control data wijinnian金年会out delay in response to demands for 5G. In jinnian金年会e data center market, AI/GPU requires high processing performance, hence it uses high-speed communication.

jinnian金年会e next generation high speed interface products will change jinnian金年会e corporate brand equity from “jinnian金年会ine best known for its LCD TV” to “jinnian金年会ine best known for its high-speed interfaces."